This application claims the priority of Korean Patent Application No. 10-2006-0018869, filed on Feb. 27, 2006, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates to a method of manufacturing an electrode burying dielectric wall for a display, and more particularly, to a plasma display panel having excellent brightness and discharge efficiency and an improved structure of a dielectric wall for burying electrodes disposed in a region other than discharge cells, a method of manufacturing an electrode burying dielectric wall of a display panel and a method of manufacturing an electrode burying dielectric wall of the plasma display panel.
2. Description of the Related Art
Plasma display panels (PDP) have recently replaced conventional cathode ray tube (CRT) display devices. In a PDP, a discharge gas is sealed between two substrates on which a plurality of discharge electrodes are formed, a discharge voltage is applied, phosphor formed in a predetermined pattern by ultraviolet rays generated by the discharge voltage is excited whereby a desired image is obtained.
A conventional AC surface discharge type PDP includes a front substrate, sustain electrodes disposed on the front substrate, a front dielectric layer covering the sustain electrodes, a protective layer covering the front dielectric layer, a rear substrate opposing the front substrate, address electrodes disposed on the rear substrate to be parallel to one another, a rear dielectric layer covering the address electrodes, barrier ribs formed on the rear dielectric layer, and phosphor layers formed on a top surface of the rear dielectric layer and on sides of the barrier ribs.
However, in the conventional PDP, the sustain electrodes, the front dielectric layer and the protective layer sequentially formed on the sustain electrodes exist on the front substrate through which visible rays emitted from the phosphor layers in a discharge space pass. Due to the factors, there is a problem that a transmission ratio of the visible rays is about 60%.
In addition, the sustain electrodes that cause a discharge are formed on a top surface of the discharge space, that is, on an inner side surface of the front substrate through which the visible rays pass, so that a discharge is diffused from the inner side surface of the front substrate. Thus, there is an inherent problem that a luminous efficiency is lowered.
To address the problem, as Illustrated in FIG. 1, a plasma display panel (PDP) 10 disclosed in Korean Patent Laid-open Publication No. 2005-0113533 includes upper barrier ribs 40 which are disposed between a front substrate 20 and a rear substrate 30 separated from each other in a vertical direction, define discharge cells 50 together with the front substrate 20 and the rear substrate 30 and are formed of dielectric, and upper and lower discharge electrodes 43 and 44 disposed in the upper barrier ribs 40 to be separated from each other and to surround the discharge cells 50. That is, the upper barrier ribs 40 are disposed between the neighboring discharge cells 50 (not in the discharge space) in a vertical direction, and the upper and lower discharge electrodes 43 and 44 are disposed in the upper barrier ribs 40 to be separated from each other.
As such, the electrodes, the front dielectric layer, and the protective layer need not exist on the front substrate 20 so that an aperture ratio of the panel is significantly improved. In addition, the upper and lower discharge electrodes 43 and 44 that cause a discharge are disposed on sides of the discharge space so that a discharge area is increased and a luminous efficiency is improved. A protective layer 49 may be applied to sides of the upper barrier ribs 40.
Address electrodes 33, a rear dielectric layer 35 covering the address electrodes 33, lower barrier ribs 37 formed on the rear dielectric layer 35, and phosphor layers 39 formed on a top surface of the rear dielectric layer 35 and on sides of the lower barrier ribs 37, are disposed on the rear substrate 30.
In this case, in the prior art, a plurality of barrier ribs formed of dielectric are stacked so that the upper barrier ribs 40 having the above structure are formed. That is, as illustrated in FIG. 2, one upper barrier rib 40 can be formed in such a manner that a first barrier wall portion 40a, a second barrier wall portion 40b, and a third barrier wall portion 40c are sequentially stacked on a bottom surface of the front substrate 20. In this case, the first, second, and third barrier wall portions 40a, 40b, and 40c are formed of dielectric.
A process of manufacturing the upper barrier ribs 40 will now be briefly described. The first barrier wall portion 40a is formed on the bottom surface of the front substrate 20. After that, the upper discharge electrodes 43 are formed on the first barrier wall portion. 40a in a printing manner and then, the second barrier wall portion 40b , is formed to bury the upper discharge electrodes 43. After that, the lower discharge electrodes 44 are formed on the second barrier wall portion 40b in a printing manner and then, the third barrier wall portion 40c is formed to bury the lower discharge electrodes 44, thereby manufacturing the upper barrier ribs 40 for burying the upper and lower discharge electrodes 43 and 44. In this case, in order to form the first barrier wall portion 40a, the second barrier wall portion 40b, and the third barrier wall portion 40c of the upper barrier ribs 40, respectively, an operation of patterning a dielectric paste in a predetermined shape should be performed and baking should be performed in the patterning operation so that resin components are necessarily removed from the dielectric paste.
However, temperature for baking is over 500° C. Thus, the types of materials that can be used to form the upper barrier ribs 40 are restricted so that the upper barrier ribs 40 can withstand the baking temperature. That is, a main component of the upper barrier ribs 40 should be PbO, B2O3, and SiO2 etc., for example, which are materials for a conventional front dielectric layer. These materials have dielectric constants of 8-12. Thus, the upper barrier ribs 40 need to be formed at a predetermined thickness, for example, to a large thickness of 80-120 μm, so that electric conductivity of the upper barrier ribs 40 can be properly set. Accordingly, costs for the upper barrier ribs 40 increase and the discharge space is reduced.
In addition, since the upper and lower discharge electrodes 43 and 44 are manufactured in a printing manner, an electrode width is about over 60 μm, for example, and there are limitations in making the electrode width fine. In addition, the thickness of the electrode cannot be increased.
The upper barrier ribs 40 can be manufactured in a sheet shape. In this case, a portion of a raw material for the upper barrier ribs 40 corresponding to the discharge space is removed using mechanical drill, thereby manufacturing the upper barrier ribs 40. By using the mechanical drill, a manufacturing time is increased and productivity is lowered.